library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;

entity mult_unsgn_pp_trunc is

  generic (
    BWa : natural := 16;                -- Bit width of Multiplier
    BWb : natural := 16;
    K   : natural := 15);  -- Vertical truncation                                                                                                                         

  port (
    da   : in  std_logic_vector(BWa-1 downto 0);
    db   : in  std_logic_vector(BWb-1 downto 0);
    dout : out std_logic_vector(BWa+BWb-1 downto 0));

end mult_unsgn_pp_trunc;

architecture str of mult_unsgn_pp_trunc is

  type stlv_array is array (0 to BWa-1) of std_logic_vector(BWa+BWb-2 downto 0);
  signal pp : stlv_array;
  --signal pp_res : std_logic_vector(BWa+BWb-1 downto 0);

begin  -- str                                                                                                                                                                          

  ppGen : process (da, db)
    variable ppt : stlv_array;
  begin
    ppt := (others => (others => '0'));
    -- partial products da(i)db(j) EX:
    --                                     da(0)db(3) da(0)db(2) da(0)db(1) da(0)db(0)
    --                          da(1)db(3) da(1)db(2) da(1)db(1) da(1)db(0)
    --               da(2)db(3) da(2)db(2) da(2)db(1) da(2)db(0)
    --    da(3)db(3) da(3)db(2) da(3)db(1) da(3)db(0)
    for i in 0 to BWa-1 loop
      for j in 0 to BWb-1 loop
        if (i+j > K-1) then
          ppt(i)(i+j) := da(i) and db(j);
        end if;
      end loop;
    end loop;
    PP <= ppt;
  end process ppGen;


  CSA_tree : process (pp)
    variable pp_add : std_logic_vector(BWa+BWb-1 downto 0);
  begin  -- process CSA_tree
    for i in 0 to BWa-1 loop
      if i = 0 then
        pp_add := '0' & pp(0)(BWa+BWb-2 downto 0);
      else
        pp_add := std_logic_vector(unsigned('0'&pp(i)(BWa+BWb-2 downto 0)) + unsigned(pp_add));
      end if;
    end loop;  -- i 
    --pp_res <= pp_add;
    dout <= pp_add;
  end process CSA_tree;

  --  dout <= pp_res;
  --dout(BWa+BWb-1 downto 16) <= pp_res(BWa+BWb-1 downto 16);
  --dout(15 downto 0)         <= (others => '0');

end str;