System Settings

 
Environment Settings
Environment Variable xst ngdbuild map par
LD_LIBRARY_PATH /opt/Xilinx/14.7/ISE_DS/ISE//lib/lin64:
/opt/Xilinx/14.7/ISE_DS/ISE/lib/lin64:
/opt/Xilinx/14.7/ISE_DS/EDK/lib/lin64:
/opt/Xilinx/14.7/ISE_DS/common/lib/lin64
/opt/Xilinx/14.7/ISE_DS/ISE//lib/lin64:
/opt/Xilinx/14.7/ISE_DS/ISE/lib/lin64:
/opt/Xilinx/14.7/ISE_DS/EDK/lib/lin64:
/opt/Xilinx/14.7/ISE_DS/common/lib/lin64
/opt/Xilinx/14.7/ISE_DS/ISE//lib/lin64:
/opt/Xilinx/14.7/ISE_DS/ISE/lib/lin64:
/opt/Xilinx/14.7/ISE_DS/EDK/lib/lin64:
/opt/Xilinx/14.7/ISE_DS/common/lib/lin64
/opt/Xilinx/14.7/ISE_DS/ISE//lib/lin64:
/opt/Xilinx/14.7/ISE_DS/ISE/lib/lin64:
/opt/Xilinx/14.7/ISE_DS/EDK/lib/lin64:
/opt/Xilinx/14.7/ISE_DS/common/lib/lin64
PATH /opt/Xilinx/14.7/ISE_DS/ISE//bin/lin64:
/opt/Xilinx/14.7/ISE_DS/ISE/bin/lin64:
/opt/Xilinx/14.7/ISE_DS/ISE/sysgen/util:
/opt/Xilinx/14.7/ISE_DS/ISE/../../../DocNav:
/opt/Xilinx/14.7/ISE_DS/PlanAhead/bin:
/opt/Xilinx/14.7/ISE_DS/EDK/bin/lin64:
/opt/Xilinx/14.7/ISE_DS/EDK/gnu/microblaze/lin/bin:
/opt/Xilinx/14.7/ISE_DS/EDK/gnu/powerpc-eabi/lin/bin:
/opt/Xilinx/14.7/ISE_DS/EDK/gnu/arm/lin/bin:
/opt/Xilinx/14.7/ISE_DS/EDK/gnu/microblaze/linux_toolchain/lin64_be/bin:
/opt/Xilinx/14.7/ISE_DS/EDK/gnu/microblaze/linux_toolchain/lin64_le/bin:
/opt/Xilinx/14.7/ISE_DS/common/bin/lin64:
/usr/lib64/qt-3.3/bin:
/sge-root/bin/linux-x64:
/usr/local/bin:
/usr/bin:
/usr/local/sbin:
/usr/sbin:
/home/davrot/bin:
/tools/baltam/bin/
/opt/Xilinx/14.7/ISE_DS/ISE//bin/lin64:
/opt/Xilinx/14.7/ISE_DS/ISE/bin/lin64:
/opt/Xilinx/14.7/ISE_DS/ISE/sysgen/util:
/opt/Xilinx/14.7/ISE_DS/ISE/../../../DocNav:
/opt/Xilinx/14.7/ISE_DS/PlanAhead/bin:
/opt/Xilinx/14.7/ISE_DS/EDK/bin/lin64:
/opt/Xilinx/14.7/ISE_DS/EDK/gnu/microblaze/lin/bin:
/opt/Xilinx/14.7/ISE_DS/EDK/gnu/powerpc-eabi/lin/bin:
/opt/Xilinx/14.7/ISE_DS/EDK/gnu/arm/lin/bin:
/opt/Xilinx/14.7/ISE_DS/EDK/gnu/microblaze/linux_toolchain/lin64_be/bin:
/opt/Xilinx/14.7/ISE_DS/EDK/gnu/microblaze/linux_toolchain/lin64_le/bin:
/opt/Xilinx/14.7/ISE_DS/common/bin/lin64:
/usr/lib64/qt-3.3/bin:
/sge-root/bin/linux-x64:
/usr/local/bin:
/usr/bin:
/usr/local/sbin:
/usr/sbin:
/home/davrot/bin:
/tools/baltam/bin/
/opt/Xilinx/14.7/ISE_DS/ISE//bin/lin64:
/opt/Xilinx/14.7/ISE_DS/ISE/bin/lin64:
/opt/Xilinx/14.7/ISE_DS/ISE/sysgen/util:
/opt/Xilinx/14.7/ISE_DS/ISE/../../../DocNav:
/opt/Xilinx/14.7/ISE_DS/PlanAhead/bin:
/opt/Xilinx/14.7/ISE_DS/EDK/bin/lin64:
/opt/Xilinx/14.7/ISE_DS/EDK/gnu/microblaze/lin/bin:
/opt/Xilinx/14.7/ISE_DS/EDK/gnu/powerpc-eabi/lin/bin:
/opt/Xilinx/14.7/ISE_DS/EDK/gnu/arm/lin/bin:
/opt/Xilinx/14.7/ISE_DS/EDK/gnu/microblaze/linux_toolchain/lin64_be/bin:
/opt/Xilinx/14.7/ISE_DS/EDK/gnu/microblaze/linux_toolchain/lin64_le/bin:
/opt/Xilinx/14.7/ISE_DS/common/bin/lin64:
/usr/lib64/qt-3.3/bin:
/sge-root/bin/linux-x64:
/usr/local/bin:
/usr/bin:
/usr/local/sbin:
/usr/sbin:
/home/davrot/bin:
/tools/baltam/bin/
/opt/Xilinx/14.7/ISE_DS/ISE//bin/lin64:
/opt/Xilinx/14.7/ISE_DS/ISE/bin/lin64:
/opt/Xilinx/14.7/ISE_DS/ISE/sysgen/util:
/opt/Xilinx/14.7/ISE_DS/ISE/../../../DocNav:
/opt/Xilinx/14.7/ISE_DS/PlanAhead/bin:
/opt/Xilinx/14.7/ISE_DS/EDK/bin/lin64:
/opt/Xilinx/14.7/ISE_DS/EDK/gnu/microblaze/lin/bin:
/opt/Xilinx/14.7/ISE_DS/EDK/gnu/powerpc-eabi/lin/bin:
/opt/Xilinx/14.7/ISE_DS/EDK/gnu/arm/lin/bin:
/opt/Xilinx/14.7/ISE_DS/EDK/gnu/microblaze/linux_toolchain/lin64_be/bin:
/opt/Xilinx/14.7/ISE_DS/EDK/gnu/microblaze/linux_toolchain/lin64_le/bin:
/opt/Xilinx/14.7/ISE_DS/common/bin/lin64:
/usr/lib64/qt-3.3/bin:
/sge-root/bin/linux-x64:
/usr/local/bin:
/usr/bin:
/usr/local/sbin:
/usr/sbin:
/home/davrot/bin:
/tools/baltam/bin/
XILINX /opt/Xilinx/14.7/ISE_DS/ISE/ /opt/Xilinx/14.7/ISE_DS/ISE/ /opt/Xilinx/14.7/ISE_DS/ISE/ /opt/Xilinx/14.7/ISE_DS/ISE/
XILINX_DSP /opt/Xilinx/14.7/ISE_DS/ISE /opt/Xilinx/14.7/ISE_DS/ISE /opt/Xilinx/14.7/ISE_DS/ISE /opt/Xilinx/14.7/ISE_DS/ISE
XILINX_EDK /opt/Xilinx/14.7/ISE_DS/EDK /opt/Xilinx/14.7/ISE_DS/EDK /opt/Xilinx/14.7/ISE_DS/EDK /opt/Xilinx/14.7/ISE_DS/EDK
XILINX_PLANAHEAD /opt/Xilinx/14.7/ISE_DS/PlanAhead /opt/Xilinx/14.7/ISE_DS/PlanAhead /opt/Xilinx/14.7/ISE_DS/PlanAhead /opt/Xilinx/14.7/ISE_DS/PlanAhead
 
Synthesis Property Settings
Switch Name Property Name Value Default Value
-ifn   Example2.prj  
-ifmt   mixed MIXED
-ofn   Example2  
-ofmt   NGC NGC
-p   xc3s1400a-5-ft256  
-top   Example2  
-opt_mode Optimization Goal Speed SPEED
-opt_level Optimization Effort 2 1
-iuc Use synthesis Constraints File NO NO
-keep_hierarchy Keep Hierarchy No NO
-netlist_hierarchy Netlist Hierarchy As_Optimized as_optimized
-rtlview Generate RTL Schematic Yes NO
-glob_opt Global Optimization Goal AllClockNets ALLCLOCKNETS
-read_cores Read Cores YES YES
-sd Cores Search Directories {"ipcore_dir" }  
-write_timing_constraints Write Timing Constraints NO NO
-cross_clock_analysis Cross Clock Analysis NO NO
-bus_delimiter Bus Delimiter <> <>
-slice_utilization_ratio Slice Utilization Ratio 100 100%
-bram_utilization_ratio BRAM Utilization Ratio 100 100%
-verilog2001 Verilog 2001 YES YES
-fsm_extract   YES YES
-fsm_encoding   Auto AUTO
-safe_implementation   No NO
-fsm_style   LUT LUT
-ram_extract   Yes YES
-ram_style   Auto AUTO
-rom_extract   Yes YES
-shreg_extract   YES YES
-rom_style   Auto AUTO
-auto_bram_packing   NO NO
-resource_sharing   YES YES
-async_to_sync   NO NO
-mult_style   Auto AUTO
-iobuf   YES YES
-max_fanout   500 500
-bufg   24 24
-register_duplication   YES YES
-register_balancing   No NO
-optimize_primitives   NO NO
-use_clock_enable   Yes YES
-use_sync_set   Yes YES
-use_sync_reset   Yes YES
-iob   Auto AUTO
-equivalent_register_removal   YES YES
-slice_utilization_ratio_maxmargin   5 0%
 
Translation Property Settings
Switch Name Property Name Value Default Value
-aul Allow Unmatched LOC Constraints true false
-aut Allow Unmatched Timing Group Constraints true false
-intstyle   ise None
-dd   _ngo None
-p   xc3s1400a-ft256-5 None
-sd Macro Search Path ipcore_dir None
-uc   ZestET1.ucf None
 
Map Property Settings
Switch Name Property Name Value Default Value
-ol Place & Route Effort Level (Overall) std high
-ir Use RLOC Constraints OFF OFF
-ignore_keep_hierarchy Allow Logic Optimization Across Hierarchy TRUE FALSE
-logic_opt Combinatorial Logic Optimization TRUE FALSE
-ntd Timing Mode Map TRUE FALSE
-t Starting Placer Cost Table (1-100) Map 1 0
-cm Optimization Strategy (Cover Mode) speed area
-intstyle   ise None
-o   Example2_map.ncd None
-pr Pack I/O Registers/Latches into IOBs off off
-p   xc3s1400a-ft256-5 None
 
Place and Route Property Settings
Switch Name Property Name Value Default Value
-t   1 1
-xe   n None
-intstyle   ise  
-w   true false
-pl Placer Effort Level (Overrides Overall Level) high std
-rl Router Effort Level (Overrides Overall Level) high std
 
Operating System Information
Operating System Information xst ngdbuild map par
CPU Architecture/Speed Intel(R) Core(TM) i7 CPU 960 @ 3.20GHz/3207.340 MHz Intel(R) Core(TM) i7 CPU 960 @ 3.20GHz/3207.340 MHz Intel(R) Core(TM) i7 CPU 960 @ 3.20GHz/3207.340 MHz Intel(R) Core(TM) i7 CPU 960 @ 3.20GHz/3207.340 MHz
Host hardkernel hardkernel hardkernel hardkernel
OS Name Scientific Scientific Scientific Scientific
OS Release Scientific Linux release 7.3 (Nitrogen) Scientific Linux release 7.3 (Nitrogen) Scientific Linux release 7.3 (Nitrogen) Scientific Linux release 7.3 (Nitrogen)