From 29276830a7f5b7fbc8a7163977d776c891da2919 Mon Sep 17 00:00:00 2001 From: Retrocamara42 Date: Thu, 3 Jul 2025 07:52:59 -0500 Subject: [PATCH 1/2] fix: unused bit in t_addr --- router/router_types.vhdl | 4 ++-- synthesis/cmd/do_synth_router_lvl1.sh | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/router/router_types.vhdl b/router/router_types.vhdl index e98b5c0..dc1122c 100644 --- a/router/router_types.vhdl +++ b/router/router_types.vhdl @@ -47,8 +47,8 @@ package router_types is end record; type t_addr is record - x : std_logic_vector(DEST_ADDR_SIZE-1 downto 0); - y : std_logic_vector(DEST_ADDR_SIZE-1 downto 0); + x : std_logic_vector(DEST_ADDR_SIZE-1 downto 1); -- last bit is always '-' for all routers + y : std_logic_vector(DEST_ADDR_SIZE-1 downto 1); end record; type t_pos_addr is record diff --git a/synthesis/cmd/do_synth_router_lvl1.sh b/synthesis/cmd/do_synth_router_lvl1.sh index 6d6b844..b070bd0 100644 --- a/synthesis/cmd/do_synth_router_lvl1.sh +++ b/synthesis/cmd/do_synth_router_lvl1.sh @@ -1 +1 @@ -LEVEL=1 NPU=2 NPD=1 CHIP_X=00001 CHIP_Y=00001 dc_shell -x "source cmd/do_synth_arbiter.tcl; quit" | tee -a log/synthesis.log \ No newline at end of file +LEVEL=1 NPU=2 NPD=1 CHIP_X=00001 CHIP_Y=00001 dc_shell -x "source cmd/do_synth_router.tcl; quit" | tee -a log/synthesis.log From b2835e391ac1b502d36261013ba601c23f0bf3a6 Mon Sep 17 00:00:00 2001 From: Retrocamara42 Date: Thu, 3 Jul 2025 07:54:00 -0500 Subject: [PATCH 2/2] fix: no clk in arbiter --- synthesis/cmd/do_synth_arbiter.tcl | 13 ------------- 1 file changed, 13 deletions(-) diff --git a/synthesis/cmd/do_synth_arbiter.tcl b/synthesis/cmd/do_synth_arbiter.tcl index 36f6513..2ed5f1b 100644 --- a/synthesis/cmd/do_synth_arbiter.tcl +++ b/synthesis/cmd/do_synth_arbiter.tcl @@ -7,19 +7,6 @@ analyze -library WORK -format vhdl {../router/routing_functions.vhdl} analyze -library WORK -format vhdl {../router/arbiter.vhdl} elaborate arbiter -library WORK -parameters "level = $level, num_paths_up = $npu, num_paths_down = $npd" check_design - -create_clock [get_ports clk] -period 8.0 -waveform {0 4} -name clk - -set_clock_uncertainty 0.025 -setup [get_clocks clk] -set_clock_uncertainty 0.025 -hold [get_clocks clk] -set_clock_transition -fall 0.04 [get_clocks clk] -set_clock_transition -rise 0.04 [get_clocks clk] - -set_clock_latency -max -source 0.1 [get_clocks clk] - -set_input_delay -max -clock clk 0.05 [get_ports {rout_pos packets valid_data avai_paths}] -set_output_delay -max -clock clk 0.05 [all_outputs] - check_timing compile report_area > reports/arbiter-$level-spl_synth.area