# PAICORE NoC IMPLEMENTATION
## Description
This project implements a five-level up-down quadtree Network-on-Chip (NoC) with multiple upstream and downstream datapaths, based on the [PAICORE architecture](https://ieeexplore.ieee.org/document/10614635/).

## NoC features
- GALS (Globally Asynchronous, Locally Synchronous) design style
- Use of Address Event Representation (AER)
- Supports two packet types: normal and payload
- Capable of unicast and multicast communication

## Reminder for Router L1
FIFO0 -> DS4 -> Pos 11
FIFO1 -> DS3 -> Pos 10
FIFO2 -> DS2 -> Pos 01
FIFO3 -> DS1 -> Pos 00
FIFO4 -> U   -> Upstream
FIFO5 -> U   -> Upstream

## Schematics
### FIFO
![alt text](./drawings/fifo.png)

### Get routing direction
![alt text](./drawings/routing_direction.png)

### Set out buffer
![alt text](./drawings/set_out_buffer.png)

### Arbitrer
![alt text](./drawings/arbitrer.png)

### Write controller
![alt text](./drawings/write_ctrl.png)

### Read controller
![alt text](./drawings/read_ctrl.png)

### Router
![alt text](./drawings/router.png)

# TODO: rewrite sh and tcl files
# TODO: cadence-area consumption (synthesis)