library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;

entity encoder16to4 is
    port (
        din   : in STD_LOGIC_VECTOR(15 downto 0);
        dout  : out STD_LOGIC_VECTOR(3 downto 0);
        valid : out STD_LOGIC   -- '1' if any input is high, '0' if all zero
    );
end encoder16to4;

architecture impl of encoder16to4 is
begin
    process(din)
    begin
        valid <= '1';
        if din(15) = '1' then
            dout <= "1111";
        elsif din(14) = '1' then
            dout <= "1110";
        elsif din(13) = '1' then
            dout <= "1101";
        elsif din(12) = '1' then
            dout <= "1100";
        elsif din(11) = '1' then
            dout <= "1011";
        elsif din(10) = '1' then
            dout <= "1010";
        elsif din(9) = '1' then
            dout <= "1001";
        elsif din(8) = '1' then
            dout <= "1000";
        elsif din(7) = '1' then
            dout <= "0111";
        elsif din(6) = '1' then
            dout <= "0110";
        elsif din(5) = '1' then
            dout <= "0101";
        elsif din(4) = '1' then
            dout <= "0100";
        elsif din(3) = '1' then
            dout <= "0011";
        elsif din(2) = '1' then
            dout <= "0010";
        elsif din(1) = '1' then
            dout <= "0001";
        elsif din(0) = '1' then
            dout <= "0000";
        else
            dout <= "0000";
            valid <= '0';
        end if;
    end process;
end impl;