paicore_behavioral/encoders/encoder4to2.vhdl
2025-07-18 05:09:06 -05:00

31 lines
No EOL
731 B
VHDL

library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
entity encoder4to2 is
port (
din : in STD_LOGIC_VECTOR(3 downto 0);
dout : out STD_LOGIC_VECTOR(1 downto 0);
valid : out STD_LOGIC -- '1' if any input is high, '0' if all zero
);
end encoder4to2;
architecture impl of encoder4to2 is
begin
process(din)
begin
valid <= '1';
if din(3) = '1' then
dout <= "11";
elsif din(2) = '1' then
dout <= "10";
elsif din(1) = '1' then
dout <= "01";
elsif din(0) = '1' then
dout <= "00";
else
dout <= "00";
valid <= '0';
end if;
end process;
end impl;