323 lines
12 KiB
VHDL
323 lines
12 KiB
VHDL
-------------------------------------------------------------------------------
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-- Title : Package for modular, heterogenous 3D NoC
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-- Project : Modular, heterogenous 3D NoC
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-------------------------------------------------------------------------------
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-- File : NOC_3D_PACKAGE.vhd
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-- Author : Lennart Bamberg <bamberg@office.item.uni-bremen.de>
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-- Company :
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-- Created : 2018-10-24
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-- Last update: 2018-11-28
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-- Platform :
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-- Standard : VHDL'93/02
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-------------------------------------------------------------------------------
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-- Description: Package including the constants, types, function and components
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-- required for the modular, heterogenous 3D NoC.
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-------------------------------------------------------------------------------
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-- Copyright (c) 2018
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-------------------------------------------------------------------------------
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-- Revisions :
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-- Date Version Author Description
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-- 2018-10-24 1.0 bamberg Created
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-------------------------------------------------------------------------------
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library ieee;
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use ieee.std_logic_1164.all;
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use ieee.math_real.all;
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use ieee.numeric_std.all;
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package NOC_3D_PACKAGE is
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--------------------------------------------------------------------------------
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---------------------- CONSTANTS -----------------------------------------------
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--------------------------------------------------------------------------------
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---- The following lines can be edited to change the router architecture
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---- With VHDL2008 these should be generic of the package
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constant flit_size : positive := 32; -- Flit size in bits
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constant max_vc_num : positive := 4; -- Max VCs of an input phy. channel
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constant max_vc_num_out : positive := 4; -- Max VCs of an op. channel
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constant max_x_dim : positive := 4; -- Max number of routers in X-dim
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constant max_y_dim : positive := 4; -- Max number of routers in Y-dim
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constant max_Z_dim : positive := 4; -- Max number of routers in Z-dim
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constant max_packet_len : positive := 31; -- Max packet_length in flits
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-- (ideal is 2^N-1)
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constant max_port_num : positive := 7; -- Max number of router port
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-- Which port-num belongs to witch port
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constant int_local : natural := 0;
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constant int_north : natural := 1;
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constant int_east : natural := 2;
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constant int_south : natural := 3;
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constant int_west : natural := 4;
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constant int_up : natural := 5;
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constant int_down : natural := 6;
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-- General contants for the used technology
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constant RST_LVL : std_logic := '0'; -- Level to acticate reset ('1' =>
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-- active high; '0' => active low)
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-- Clock cycle in nano second
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constant clk_period : time := 10 ns;
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constant delay_constant : time := 300 ps;
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-- Derived constants that cannot be edited (there values is calculated later
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-- in the body)
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constant packet_len_width : positive; -- Header Bits req. for packet-length
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constant x_addr_width : positive; -- Header Bits req. for Dest. Addr X
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constant y_addr_width : positive; -- Header Bits req. for Dest. Addr Y
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constant z_addr_width : positive; -- Header Bits req. for Dest. Addr Z
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--------------------------------------------------------------------------------
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--------------------- (SUB)TYPES -----------------------------------------------
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--------------------------------------------------------------------------------
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-- General
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type integer_vec is array (natural range <>) of integer;
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type integer_array is array (natural range <>, natural range <>) of integer;
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-- Flit related
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subtype flit is std_logic_vector(flit_size-1 downto 0);
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type flit_vector is array (natural range <>) of
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std_logic_vector(flit_size-1 downto 0);
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-- Virtual channel related
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subtype vc_status_vec is std_logic_vector(max_vc_num-1 downto 0);
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subtype vc_status_vec_enc is std_logic_vector(
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positive(ceil(log2(real(max_vc_num))))-1 downto 0);
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type vc_status_array is array (natural range <>) of vc_status_vec;
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type vc_status_array_enc is array (natural range <>) of vc_status_vec_enc;
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subtype vc_prop_int is integer_vec(0 to max_vc_num-1); -- integer vc
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-- propoerties
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-- (e.g. depth)
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type vc_prop_int_array is array (natural range <>) of vc_prop_int;
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-- Full NoC related
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-- Head Flit related
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type header_inf is record
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packet_length : std_logic_vector(positive(ceil(log2(real(max_packet_len+1))))-1 downto 0);
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------------------------------- (packet_len_width-1 downto 0)
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x_dest : std_logic_vector(positive(ceil(log2(real(max_x_dim))))-1 downto 0);
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------------------------------- (x_addr_width-1 downto 0)
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y_dest : std_logic_vector(positive(ceil(log2(real(max_y_dim))))-1 downto 0);
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------------------------------- (y_addr_width-1 downto 0)
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z_dest : std_logic_vector(positive(ceil(log2(real(max_z_dim))))-1 downto 0);
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--------------------------------- (z_addr_width-1 downto 0)
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end record;
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type header_inf_vector is array (natural range <>) of header_inf;
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-- Head Flit related
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type address_inf is record
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x_dest : std_logic_vector(positive(ceil(log2(real(max_x_dim))))-1 downto 0);
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------------------------------- (x_addr_width-1 downto 0)
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y_dest : std_logic_vector(positive(ceil(log2(real(max_y_dim))))-1 downto 0);
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------------------------------- (y_addr_width-1 downto 0)
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z_dest : std_logic_vector(positive(ceil(log2(real(max_z_dim))))-1 downto 0);
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--------------------------------- (z_addr_width-1 downto 0)
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end record;
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---------------------------------------------------------------------------------
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------------------ FUNCTION-DEC. ------------------------------------------------
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---------------------------------------------------------------------------------
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-- Bits required to encode x different values
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function bit_width(x : positive) return positive;
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-- Transfer std_logic_vector (intp. unsigned) to natural integer
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function slv2int(x : std_logic_vector) return natural;
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-- Transfer "one_hot" to std_logic_vector
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function one_hot2slv(x : std_logic_vector) return std_logic_vector;
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-- Transfer "one_hot" to natural integer
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function one_hot2int(x : std_logic_vector) return natural;
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-- Get the req. information from the head_flit
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function get_header_inf(x : std_logic_vector) return header_inf;
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-- Get the dest. adress from the header information
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function extract_address_inf(x : header_inf) return address_inf;
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-- Sum all values of an integer array
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function int_vec_sum(x : integer_vec) return integer;
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-- Upper range
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function upper_range(x : integer_vec; i : natural) return natural;
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-- Lower range
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function lower_range(x : integer_vec; i : natural) return natural;
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-- Get the i^th slice of x (slice sized defined by vec)
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function slice(x : std_logic_vector;
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vec : integer_vec;
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i : natural) return std_logic_vector;
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-- Return the index of a value in an array
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function ret_index(x : integer_vec; i : integer) return integer;
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-- Return the maximum value of an array
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function ret_max(x : integer_vec) return integer;
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end package NOC_3D_PACKAGE;
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--!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!--
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--------------------- BODY -------------------------------------------------------
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--!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!--
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package body NOC_3D_PACKAGE is
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-----------------------------------------------------------------------------------
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------------------- FUNCTION-DEC. -------------------------------------------------
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-----------------------------------------------------------------------------------
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-- Bits required to encode x different values
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function bit_width(x : positive) return positive is
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begin
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assert (x > 1) report "Encoding for less than two values is not possible"
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severity failure;
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return positive(ceil(log2(real(x))));
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end function;
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-- Derived constants using function bit_width
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constant packet_len_width : positive := bit_width(max_packet_len+1);
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constant x_addr_width : positive := bit_width(max_x_dim);
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constant y_addr_width : positive := bit_width(max_y_dim);
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constant z_addr_width : positive := bit_width(max_z_dim);
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-- Transfer "std_logic_vector" (intp. unsigned) to "natural integer"
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function slv2int(x : std_logic_vector) return natural is
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begin
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return to_integer(unsigned(x));
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end function;
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-- Transfer "one_hot" to "std_logic_vector"
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function one_hot2slv(x : std_logic_vector) return std_logic_vector is
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variable var : std_logic_vector(bit_width(x'length)-1 downto 0);
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begin
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var := (others => '0');
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for i in x'range loop
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if x(i) = '1' then
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-- use "or" to avoid synthesizing a priority decoder
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var := var or std_logic_vector(to_unsigned(i, var'length));
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end if;
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end loop;
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return var;
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end function;
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-- Transfer "one_hot" to natural
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function one_hot2int(x : std_logic_vector) return natural is
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variable var : unsigned(bit_width(x'length)-1 downto 0);
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begin
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var := (others => '0');
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for i in x'range loop
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if x(i) = '1' then
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-- use "or" to avoid synthesizing a priority decoder
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var := var or to_unsigned(i, var'length);
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end if;
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end loop;
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return to_integer(var);
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end function;
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-- The following unit has to be change if the header structure is changes.
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-- Currently we assume that the LSBs are the packet-length: the next higher bits
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-- are the X, Y and then Z address. All higher value bith are currently used by higher
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-- layers. Important sofar is that is that the req. header informations
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-- (addr, packet_length) are not allowed to take mor then "flit_size" bits.
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function get_header_inf(x : std_logic_vector) return header_inf is
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variable y : header_inf;
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variable offset : integer;
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begin
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y.packet_length := x(packet_len_width-1 downto 0);
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offset := packet_len_width;
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y.x_dest := x(x_addr_width+offset-1 downto offset);
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offset := offset + x_addr_width;
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y.y_dest := x(y_addr_width+offset-1 downto offset);
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offset := offset + y_addr_width;
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y.z_dest := x(z_addr_width+offset-1 downto offset);
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return y;
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end function;
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-- Get the address information from a header
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function extract_address_inf(x : header_inf) return address_inf is
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variable y : address_inf;
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begin
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y.x_dest := x.x_dest;
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y.y_dest := x.y_dest;
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y.z_dest := x.z_dest;
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return y;
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end function;
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-- Sum of integer array
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function int_vec_sum(x : integer_vec) return integer is
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variable var : integer;
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begin
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var := 0;
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for i in x'range loop
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var := var + x(i);
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end loop;
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return var;
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end function;
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-- Uper range
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function upper_range(x : integer_vec; i : natural) return natural is
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variable var : natural;
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begin
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var := 0;
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for it in 0 to i loop
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var := var + x(it);
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end loop;
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return var-1;
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end function;
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-- Lower range
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function lower_range(x : integer_vec; i : natural) return natural is
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variable var : natural;
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begin
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var := 0;
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for it in 0 to i loop
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var := var + x(it);
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end loop;
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return var-x(i);
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end function;
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-- Slice of vector
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function slice(x : std_logic_vector; vec : integer_vec;
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i : natural) return std_logic_vector is
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begin
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return x(upper_range(vec, i) downto lower_range(vec, i));
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end function;
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-- Return the position in an array
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function ret_index(x : integer_vec; i : integer) return integer is
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variable result : integer:=-1;
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begin
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for index in 0 to x'length-1 loop
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if x(x'left+index) = i then
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result:= index;
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end if;
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end loop;
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if result=-1 then
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assert false report "INDEX IS NOT FOUND" severity error;
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end if;
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return result;
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end function;
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-- Return the maximum value of an array
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function ret_max(x : integer_vec) return integer is
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variable max_value : integer:=0;
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begin
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for index in 0 to x'length-1 loop
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if x(x'left+index) > max_value then
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max_value := x(x'left+index);
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end if;
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end loop;
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return max_value;
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end function;
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end package body NOC_3D_PACKAGE;
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