3D_NoC_Creation_Chipyard/README.md
2024-12-09 22:14:27 +01:00

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# Creating the NoC Configuration
The created NoC configuration will be: **3 × 2**
```
---0———1---
| | | |
| 2———3 |
| | | |
| 4———5 |
| | | |
---6———7---
```
## Steps to Create the NoC
### Step 1: Switch to the branch
- Switch to the branch `tutorial-asplos-2023`:
```bash
git checkout tutorial-asplos-2023
```
- **Note**: Source the environment setup script:
```bash
source env.sh
```
- It is recommended to build a new Chipyard with Gemmini in the `tutorial-asplos-2023` branch.
---
### Step 2: Edit the Configuration File
- Edit the file located at:
```
chipyard/generators/chipyard/src/main/scala/config/TutorialConfigs.scala
```
- Add the following configuration under **`TutorialPhase9Config3dgemmini`**:
```scala
class TutorialPhase9Config3dgemmini extends Config(
new constellation.soc.WithSbusNoC(constellation.protocol.TLNoCParams(
constellation.protocol.DiplomaticNetworkNodeMapping(
// inNodeMappings map master agents onto the NoC
inNodeMapping = ListMap(
"Core 0" -> 0, // Rocket frontend + Gemmini
"Core 1" -> 1, // Rocket frontend + Gemmini
"Core 2" -> 2, // Rocket frontend + Gemmini
"serial-tl" -> 0),
// outNodeMappings map client agents (L2 banks) onto the NoC
outNodeMapping = ListMap(
"system[0]" -> 3, "system[1]" -> 4, "system[2]" -> 5, "system[3]" -> 6,
"pbus" -> 7)),
NoCParams(
topology = TerminalRouter(BidirectionalTorus2D(4, 2)),
channelParamGen = (a, b) => UserChannelParams(Seq.fill(8) { UserVirtualChannelParams(4) }),
routingRelation = BlockingVirtualSubnetworksRouting(TerminalRouterRouting(Mesh2DEscapeRouting()), 5, 1),
skipValidationChecks = true
)
)) ++
// ==========================================
// DO NOT change below this line without |
// carefully adjusting the NoC config above |
// ==========================================
// add LeanGemmini to Rocket-core (as frontend)
new chipyard.config.WithMultiRoCC ++
new chipyard.config.WithMultiRoCCFromBuildRoCC(0,1,2) ++
new gemmini.DefaultGemminiConfig(gemmini.GemminiConfigs.leanConfig.copy(use_dedicated_tl_port=false)) ++
// Add 1 simple RocketCore+gemmini tile
new freechips.rocketchip.subsystem.WithNBigCores(1) ++
new freechips.rocketchip.subsystem.WithNBigCores(1) ++
new freechips.rocketchip.subsystem.WithNBigCores(1) ++
// Use 4 banks of L2 cache
new freechips.rocketchip.subsystem.WithNBanks(4) ++
new chipyard.config.AbstractConfig
)
```
---
### Step 3: Build the Configuration
- Navigate to the directory:
```
chipyard/sims/verilator
```
- Build the configuration using the following command:
```bash
make debug CONFIG=TutorialPhase9Config3dgemmini -j10
```
---
### Step 4: Check the RTL Files
- Verify the generated RTL files at:
```
chipyard.TestHarness.TutorialPhase9Config3dgemmini/gen-collateral
```
---
### Step 5: Edit the Run Script
- Navigate to:
```
chipyard/generators/gemmini
```
- Edit the script `scripts/run-verilator.sh`. Replace the existing binary with:
```bash
./simulator-chipyard-TutorialPhase9Config3dgemmini${DEBUG} $PK ${full_binary_path}
```
---
### Step 6: Run the Script
- Run the Verilator simulation with:
```bash
./scripts/run-verilator.sh —debug template
```
---
### Step 7: Analyze the Waveform
- The waveform file `waveform.vcd` will be generated at:
```
chipyard/generators/gemmini/waveforms
```
- Open the waveform file using **GTKWave** for analysis.
---