DMA_for_RoCC/ROCC_INTERFACE.vhd

-- Execute custom RISC-V instructions structure:
----------------------------------------------------------------------------------------
--|    7bits     |     5bits   |   6bits    |  1bit |  1bit  |  1bit |   5bit |   7bit |
--|    Funct     |     rs2     |    rs1     |   xd  |  xs1   |  xs2  |   rd   | opcode | 
--|31          25|24         20|19        15|   14  |  13    |  12   |11     7|6      0|
----------------------------------------------------------------------------------------
--ROCC_INSTRUCTION_RS1_RS2(x, rs1, rs2, funct) variables avaliable for baremetalC is rs1,rs2-register address and funct-function
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;

----------------------RoCC Interface Entity---------------------------
entity rocc_interface is
    -- constant INST_SIZE    : integer := 6;  -- Define constant for vector size for inst of 6 bits
    -- constant LENGTH       : integer := 4;  -- Define constant for vector size for size of Id's 5 bits
    -- constant PACKET       : integer := 11; -- Define constant for vector size for size of Id's 12 bits
    -- constant REG_SIZE     : integer := 63; -- Define constant for vector size for size of Reg 63 bits
    generic (
        DMA_WRITE_TO_RAM  : std_logic_vector(6 downto 0) := "0001111";
        DMA_READ_TO_RAM   : std_logic_vector(6 downto 0) := "1111111";   
        CORE_WRITE_FUNC   : natural := 30;  -- Write function from the core
        CORE_READ_FUNC    : natural := 31;  -- Read function from the core
        INST_SIZE         : natural := 6;   -- Define constant for vector size for inst of 6 bits
        LENGTH            : natural := 4;   -- Define constant for vector size for size of Id's 5 bits
        PACKET            : natural := 11;  -- Define constant for vector size for size of Id's 12 bits
        REG_SIZE          : natural := 63   -- Define constant for vector size for size of Reg 63 bits
    );
    port(
        clk                  : in  std_logic; 
        rst                  : in  std_logic;       
        cmd_valid            : in  std_logic;                                    --From Core
        cmd_inst_funct       : in  std_logic_vector(INST_SIZE downto 0);         --From Core
        cmd_inst_opcode      : in  std_logic_vector(INST_SIZE downto 0);         --From Core
        cmd_inst_rd          : in  std_logic_vector(LENGTH    downto 0);         --From Core
        cmd_inst_rs1         : in  std_logic_vector(LENGTH    downto 0);         --From Core
        cmd_inst_rs2         : in  std_logic_vector(LENGTH    downto 0);         --From Core
        cmd_inst_xd          : in  std_logic;                                    --From Core
        cmd_inst_xs1         : in  std_logic;                                    --From Core
        cmd_inst_xs2         : in  std_logic;                                    --From Core
        cmd_rs1              : in  std_logic_vector(REG_SIZE downto 0);          --From Core
        cmd_rs2              : in  std_logic_vector(REG_SIZE downto 0);          --From Core
        data_trans_from_dma  : in  std_logic_vector(LENGTH   downto 0);          --From DMA
        cmd_busy             : out std_logic;                                    --To Core 
        cmd_ready            : out std_logic;                                    --To Core --always one
        funct_to_dma         : out std_logic_vector(INST_SIZE downto 0);         --To DMA  
        address_to_dma       : out std_logic_vector(INST_SIZE downto 0);         --To DMA  
        size_to_dma          : out std_logic_vector(LENGTH    downto 0)          --To DMA  
        );
end entity;

----------------------Rocc Interface Behaviour------------------------

architecture rocc_interface_arch of rocc_interface is
    Signal cmd_rs1_sig         : std_logic_vector(REG_SIZE downto 0);
    signal cmd_rs2_sig         : std_logic_vector(REG_SIZE downto 0);
    Signal cmd_inst_funct_sig  : std_logic_vector(INST_SIZE downto 0);
    Signal cmd_valid_sig       : std_logic;
    --signal Sent_packet   : std_logic_vector(4 downto 0);
    --signal packet_length : std_logic_vector(4 downto 0);

begin
    process(clk, rst)
    begin
        if rst = '0' then
            cmd_busy                 <= '0';                  
            cmd_ready                <= '1';                --To Core --always one
            cmd_valid_sig            <= '0';
            funct_to_dma             <= (others => '0');        
            address_to_dma           <= (others => '0');       
            size_to_dma              <= (others => '0');
            cmd_rs1_sig              <= (others => '0');
            cmd_rs2_sig              <= (others => '0');
            cmd_inst_funct_sig       <= (others => '0');

        elsif rising_edge(clk) then

--------------------Send to the DMA--------------------------------

            if((cmd_valid_sig = '1') and  (cmd_rs2_sig(LENGTH downto 0) > data_trans_from_dma)) then
                if cmd_inst_funct = std_logic_vector(to_unsigned(CORE_WRITE_FUNC, 7)) then    --#define DMA_WRITE_TO_RAM  30 /// 0X1E
                    funct_to_dma     <= DMA_WRITE_TO_RAM;
                elsif cmd_inst_funct = std_logic_vector(to_unsigned(CORE_READ_FUNC, 7))then--"001111" then --#define DMA_READ_FROM_RAM 31  /// 0X1F
                    funct_to_dma     <= DMA_READ_TO_RAM;
                else 
                    funct_to_dma     <= (others => '0');
                end if;                
                address_to_dma       <= cmd_rs1_sig(INST_SIZE downto 0);
                size_to_dma          <= cmd_rs2_sig(LENGTH downto 0);
--------------------Reading from RoCC--------------------------------

            elsif (cmd_valid = '1') then
                cmd_rs1_sig          <= cmd_rs1; 
                cmd_rs2_sig          <= cmd_rs2; --size 4 downto 0 [5bits]
                cmd_inst_funct_sig   <= cmd_inst_funct;
                cmd_valid_sig        <= '1';
            else
                cmd_valid_sig        <= '0';
                cmd_rs1_sig          <= (others => '0');
                cmd_rs1_sig          <= (others => '0');
                cmd_inst_funct_sig   <= (others => '0');

            end if;
        end if;
    end process;
end architecture;